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Final Electrical Specifications
LT1671 60ns, Low Power, Single Supply, Ground-Sensing Comparator
July 1998
FEATURES
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DESCRIPTION
The LT (R)1671 is a low power 60ns comparator with complementary outputs and latch. The input common mode range extends from 1.5V below the positive supply down to the negative supply rail. Like the LT1394, LT1016 and LT1116, this comparator has complementary outputs designed to interface directly to TTL or CMOS logic. The LT1671 may operate from either a single 5V supply or dual 5V supplies. Low offset voltage specifications and high gain allow the LT1671 to be used in precision applications. The LT1671 is designed for improved speed and stability for a wide range of operating conditions. The output stage provides active drive in both directions for maximum speed into TTL, CMOS or passive loads with minimal cross-conduction current. Unlike other fast comparators, the LT1671 remains stable even for slow transitions through the active region, which eliminates the need to specify a minimum input slew rate. The LT1671 has an internal, TTL/CMOS compatible latch for retaining data at the outputs. The latch holds data as long as the LATCH pin is held high. Device parameters such as gain, offset and negative power supply current are not significantly affected by variations in negative supply voltage.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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Low Power: 450A Fast: 60ns at 20mV Overdrive 85ns at 5mV Overdrive Low Offset Voltage: 0.8mV Operates Off Single 5V or Dual 5V Supplies Input Common Mode Extends to Negative Supply No Minimum Input Slew Rate Requirement Complementary TTL Outputs Inputs Can Exceed Supplies without Phase Reversal Pin Compatible with LT1394, LT1016 and LT1116 Output Latch Capability Available in SO-8 Package
APPLICATIONS
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High Speed A/D Converters Zero-Crossing Detectors Current Sense for Switching Regulators Extended Range V/F Coverters Fast Pulse Height/Width Discriminators High Speed Triggers Line Receivers High Speed Sampling Circuits
TYPICAL APPLICATION
1MHz Crystal Oscillator
5V 2k 1MHz CRYSTAL (AT-CUT) 120 100 140
Propagation Delay vs Overdrive
VS = 5V VSTEP = 100mV TA = 25C RL = 1M
TIME (ns)
+
2k LT1671 OUTPUT
80 FALLING EDGE (tPDHL) 60
-
2k 0.068F
1671 TA01
40 20
0
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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10
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U
RISING EDGE (tPDLH)
20 30 OVERDRIVE (mV)
40
50
1671 TA02
1
LT1671
ABSOLUTE MAXIMUM RATINGS
Positive Supply Voltage ............................................. 7V Negative Supply Voltage .......................................... - 7V Total Supply Voltage (V + to V -) .............................. 12V Differential Input Voltage ....................................... 12V Input and Latch Current ...................................... 10mA Output Current (Continuous) .............................. 20mA Operating Temperature Range ..................... 0C to 70C Junction Temperature ........................................... 150C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec.)................. 300C
PACKAGE/ORDER INFORMATION
TOP VIEW V+ 1 + 8 Q OUT 7 Q OUT 6 GND 5 LATCH ENABLE
ORDER PART NUMBER LT1671CS8 S8 PART MARKING 1671
+IN 2 -IN 3 V- 4
S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150C, JA = 190C/ W
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
V + = 5V, V - = - 5V, VOUT(Q) = 1.4V, VLATCH = VCM = 0V, TA = 25C unless otherwise noted.
SYMBOL VOS VOS T IOS IB VCMR CMRR PARAMETER Input Offset Voltage Input Offset Voltage Drift Input Offset Current
q
CONDITIONS RS 100 (Note 1)
q q
MIN
TYP 0.8 4 10
MAX 2.5 4.0
UNITS mV mV V/C
100 150 280 350 3.5 3.5
Input Bias Current Input Voltage Range
(Note 2)
q q q
120 -5 0 100
q
Single 5V Supply Common Mode Rejection Ratio - 5V VCM 3.5V
55 100 55 85 50 90 60 2500 5000 3.1 3.0 0.3 0.4 450 0.5 800 1000 200 250
Single 5V Supply 0V VCM 3.5V PSRR Power Supply Rejection Ratio 4.6V V + 5.4V
q
q
- 7V V - - 2V
q
AV VOH VOL I+ I-
Small Signal Voltage Gain Output Voltage Swing High Output Voltage Swing Low Positive Supply Current
1V VOUT 2V V + 4.6V, IOUT = 400A V + 4.6V, IOUT = 4mA IOUT = - 400A IOUT = - 4mA
q q q
2.7 2.4
q
Negative Supply Current
q
75
2
U
W
U
-
U
WW
W
nA nA nA nA V V dB dB dB dB dB dB dB dB V/V V V V V A A A A
LT1671
ELECTRICAL CHARACTERISTICS
V + = 5V, V - = - 5V, VOUT(Q) = 1.4V, VLATCH = VCM = 0V, TA = 25C unless otherwise noted.
SYMBOL VIH VIL IIL t PD1 t PD2 t PD t LPD t SU tH t PW(D) PARAMETER LATCH Pin High Input Voltage LATCH Pin Low Input Voltage LATCH Pin Current Propagation Delay Propagation Delay (Note 3) Differential Propagation Delay (Note 3) Latch Propagation Delay (Note 4) Latch Setup Time (Note 4) Latch Hold Time (Note 4) Minimum Disable Pulse Width VLATCH = 0V VIN = 100mV, VOD = 20mV
q
CONDITIONS
q q q
MIN 2
TYP
MAX
UNITS V
0.8 - 250 60 85 - 1000 80 110 100 130 30
V nA ns ns ns ns ns ns ns ns ns
VIN = 100mV, VOD = 5mV
q
VIN = 100mV, VOD = 5mV
15 60 - 15 35 30
The q denotes specifications that apply over the full operating temperature range. Note 1: Input offset voltage (VOS) is defined as the average of the two voltages measured by forcing first one output, then the other to 1.4V. Note 2: Input bias current (IB) is defined as the average of the two input currents. Note 3: tPD and tPD cannot be measured in automatic handling equipment with low values of overdrive. The LT1671 is 100% tested with a 100mV step and 20mV overdrive. Correlation tests have shown that tPD and tPD limits can be guaranteed with this test, if additional DC tests are
performed to guarantee that all internal bias conditions are correct. Propagation delay (t PD) is measured with the overdrive added to the actual VOS. Differential propagation delay is defined as: t PD = t PD+ - tPD- Note 4: Latch propagation delay (t LPD) is the delay time for the output to respond when the LATCH pin is deasserted. Latch setup time (t SU) is the interval in which the input signal must remain stable prior to asserting the latch signal. Latch hold time (tH) is the interval after the latch is asserted in which the input signal must remain stable.
TYPICAL PERFORMANCE CHARACTERISTICS
Gain Characteristics
5.0 4.5 4.0 OUTPUT VOLTAGE (V) 3.5 VS = 5V IOUT = 0 TA = 25C
100 FALLING EDGE (tPDHL)
TIME (ns)
2.5 2.0 1.5 1.0 0.5 0 -2 -1 1 2 0 DIFFERENTIAL INPUT VOLTAGE (mV)
1671 G01
RISING EDGE (tPDLH) 70 VS = 5V VSTEP = 100mV VOD = 5mV TA = 25C RL = 1M 0 10 20 30 40 OUTPUT LOAD CAPACITANCE (pF) 50
1671 G02
TIME (ns)
3.0
UW
Propagation Delay vs Load Capacitance
90
Propagation Delay vs Positive Supply Voltage
90
FALLING EDGE (tPDHL) 80 RISING EDGE (tPDLH) 70 V - = -5V VSTEP = 100mV VOD = 5mV TA = 25C RL = 1M 4.4 4.6 4.8 5.0 5.2 5.4 POSITIVE SUPPLY VOLTAGE (V) 5.6
1671 G03
80
60
60
50
50
3
LT1671
APPLICATIONS INFORMATION
Common Mode Considerations The LT1671 is specified for a common mode range of - 5V to 3.5V on a 5V supply or a common mode range of 0V to 3.5V on a single 5V supply. A more general consideration is that the common mode range is 0V below the negative supply and 1.5V below the positive supply, independent of the actual supply voltage. The criterion for common mode limit is that the output still responds correctly to a small differential input signal. When either input signal falls below the negative common mode limit, the internal PN diode formed with the substrate can turn on, resulting in significant current flow through the die. An external Schottky clamp diode between the input and the negative rail can speed up recovery from negative overdrive by preventing the substrate diode from turning on. Either input may go above the positive common mode limit without damaging the comparator as long as it does not go far enough above the positive supply to conduct more than 10mA. Functionality will continue if the remaining input stays within the allowed common mode range. There will, however, be an increase in propagation delay as the input signal switches back into the common mode range. Input Bias Current Input bias current is measured with the output held at 1.4V. As with any PNP differential input stage, the LT1671 bias current flows out of the device. It will go to zero on an input which is high and double on an input which is low. LATCH Pin Dynamics The LATCH pin is intended to retain input data (output latched) when the LATCH pin goes high. The pin will float to a high state when disconnected, so a flow-through condition requires that the LATCH pin be grounded. The LATCH pin is designed to be driven with either a TTL or CMOS output. It has no built-in hysteresis. High Speed Design Techniques A substantial amount of design effort has made the LT1671 relatively easy to use. It is much less prone to oscillation than some slower comparators, even with slow input signals. However, as with any high speed comparator, there are a number of problems which may arise because of PC board layout and design. The most common problem involves power supply bypassing. Bypassing is necessary to maintain low supply impedance. DC resistance and inductance in supply wires and PC traces can quickly build up to unacceptable levels. This allows the supply line to move with changing internal current levels of the connected devices. This will almost always result in improper operation. In addition, adjacent devices connected through an unbypassed supply can interact with each other through the finite supply impedances. Bypass capacitors furnish a simple solution to this problem by providing a local reservoir of energy at the device, keeping supply impedances low. Bypass capacitors should be as close as possible to the LT1671. A good high frequency capacitor such as a 0.1F ceramic is recommended, in parallel with a larger capacitor such as a 4.7F tantalum. Poor trace routes and high source impedances are also common sources of problems. Be sure to keep trace lengths as short as possible, and avoid running any output trace adjacent to an input trace to prevent unnecessary coupling. If output traces are longer than a few inches, be sure to terminate them with a resistor to eliminate any reflections that may occur. Resistor values are typically 250 to 400. Also, be sure to keep source impedances as low as possible, preferably 1k or less.
RELATED PARTS
PART NUMBER LT1016 LT1116 LT1394 DESCRIPTION UltraFast Precision Comparator 12ns Single Supply Ground-Sensing Comparator UltraFast Single Supply Comparator
TM
UltraFast is a trademark of Linear Technology Corporation.
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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COMMENTS Industry Standard 10ns Comparator Single Supply Version of LT1016 7ns, 6mA Single Supply Comparator
1671i LT/TP 0798 4K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1998

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